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The use of high-speed PCB through holes

The through-hole design is composed of the hole and the solder pad area around the hole, as well as the inner electrical isolation area. The parasitic inductance and capacitance of a via can affect the high-speed signal passing through it. The size of the via and the solder pads connected to it have a direct impact on its properties.

1. Parasitic capacitance

The through-hole itself has parasitic capacitance to ground or power supply, if the diameter of the isolation hole on the inner layer of the through-hole is known to be D2; The diameter of the through-hole solder pad is D1; The thickness of the PCB is T; The relative dielectric constant of the board substrate is ε； Parasitic capacitance delay of via Κ The rising time of the signal in the circuit reduces the speed of the circuit. If a PCB with a thickness of 25mil is used with a through-hole with an inner diameter of 10mil and a pad diameter of 20mil, and an inner electrical gap width of 32mil, the parasitic capacitance of the through-hole can be approximately calculated to be 0.259 pF using the above formula. If the characteristic impedance of the wiring is 30 Ω, then the delay in signal rise time caused by the parasitic capacitance. The coefficient of 1/2 is because the through-hole is in the middle of the wiring. From these values, it can be seen that although the effect of slowing down the rising edge caused by parasitic capacitance of a single via is not very obvious, designers still need to carefully consider using via multiple times for interlayer switching in wiring. 2. Parasitic inductance vias also have series parasitic inductance directly related to their height and diameter. If nine is the height of the through-hole; D is the diameter of the central borehole; The parasitic inductance L of the through-hole is approximately equal to the harm caused by parasitic inductance in the design of high-speed digital circuits, which exceeds the impact of parasitic capacitance. The parasitic series inductance of the via will weaken the filtering effect of the bypass capacitor on the power or ground plane, weakening the filtering effectiveness of the entire power system. Therefore, the via of the bypass and decoupling capacitors should be as short as possible to minimize their inductance value. Based on the analysis of the parasitic characteristics of via, in order to reduce the adverse effects of via parasitic effects, high-speed PCB design should strive to: · minimize via, especially clock signal routing; ·The use of thinner PCBs is beneficial for reducing the two parasitic parameters of through-holes; ·The impedance of the through-hole should match as much as possible with the impedance of the wiring it is connected to, in order to reduce signal reflection; ·Choose a reasonable through-hole size. For multi-layer and moderately dense PCBs, it is better to choose through holes of 0.25 mm/0.51 mm/0.91 mm (drilling diameter/pad diameter/inner isolation area diameter); For some high-density PCBs, through holes of 0.20 mm/0.46 mm/0.86 mm can be used, or non through holes can be attempted; For the through holes of the power or ground wire, larger sizes can be considered to reduce impedance; ·The larger the inner electrical isolation area, the better. Considering the through-hole density on the PCB, it is generally set to D2=Dg+0.41 mm; ·The pins of the power supply and ground should be placed in vias nearby, and the shorter the lead between the vias and pins, the better, as they can increase inductance. At the same time, the leads of the power and ground should be as thick as possible to reduce impedance; ·Place some grounding vias near the vias of the signal switching layer to provide a short distance circuit for the signal. When designing, both cost and signal quality should be considered comprehensively. In high-speed PCB design, it is hoped that the smaller the via, the better, so that there is more wiring space on the board. In addition, the smaller the via, the smaller the parasitic capacitance, making it more suitable for high-speed circuits. Therefore, balanced consideration should be given in the through-hole design of high-speed PCBs.